Synopsys and Alchip Collaborate on High-Speed AI Data Center ASICs
- Reports
- 2
- Developments
- 2
- Repetition
- 0%
New informationRepeats or wire copies
What happened
Alchip Technologies presented a technical paper with Synopsys at the TSMC 2026 North America Open Innovation Platform Ecosystem Forum. The paper detailed how AI data center ASICs can overcome increasingly stringent bandwidth requirements. The collaboration integrates Synopsys 224G PHY IP with Alchip’s advanced packaging and signal integrity expertise in a protocol-agnostic design.
Why it matters
The work addresses the difficulty of moving data fast enough as AI accelerators scale to meet growing performance demands. By overcoming physical design challenges at 224 Gbps SerDes speeds, the collaboration supports the design of next-generation system architectures.
From design-reuse.com
Who's involved
Who could feel it
Possible knock-on effectsThese are possibilities Brind reasoned out, not predictions, and not advice. Most are not stated in any report.
- Marvell TechnologySpeculative
Might improve the supply of next-gen high-speed interface IP for custom silicon designs.
How it developed
Newest first. Tap a step to see who reported it.Announced technical paper on AI data center ASICs collaboration.1 source
Synopsys and Alchip announce new AI data center ASICs with high-speed SerDes.1 source